1. Field of the Invention
This invention relates to electronic devices such as integrated circuit devices, hybrid circuits and multichip integrated circuit modules, and, in particular, to the electrical connection of integrated circuits to other integrated circuits, conductive components and conductive leads within a single package. Most specifically, the invention relates to electronic device packages which include a single layer or multilayer substrate in which vias are used to interconnect the substrate to package leads or interconnect layers within the substrate, and to a method for forming such packages.
2. Related Art
An integrated circuit is formed on a semiconductor die. Usually, the die is enclosed in a package. Typically, electrical connection to components (i.e., active components such as integrated circuits, transistors and diodes, and passive components such as resistors, capacitors and inductors) outside an integrated circuit package is made via individual leads (originally part of a leadframe) extending from the package. The leads are electrically connected to the integrated circuit on the die inside the package. Historically, this electrical connection has been made by affixing bond wires between an inner portion of selected leads and bond pads on the die.
This type of electrical connection between the leads and the integrated circuit within the package was designed for use with packages: containing a single semiconductor die. The development: of multichip integrated circuit packages, where a plurality of semiconductor die are mounted on an electrically insulative surface (interconnection substrate) and enclosed in a package, necessitated a more ellaborate approach. The integrated circuits in a multichip package are typically connected to traces (conductive off-chip interconnecting paths) on the electrically insulative surface using either wire bonding technology, tape automated bonding (TAB), or flip chip technology. Electrical connection is then made between the traces on the interconnection substrate and the leads of the package by affixing bond wires between selected leads and bond pads located on the periphery of the interconnection substrate. An example of such a method is shown in U.S. Pat. No. 4,754,317 to Comstock et al.
As the complexity of integrated circuits grew, multilayer substrates were developed to improve performance and make routing easier between components. Each layer of a multilayer substrate typically comprises dielectric and conductive material. An example of such a substrate is shown in U.S. Pat. No. 4,975,761 to Chu. The additional layers allow the crossing of traces so that circuit components (i.e., active components such as integrated circuits, transistors and diodes, and passive components such as resistors, capacitors and inductors) can be placed and interconnected closer together (i.e., circuit density is increased) than would be the case if these components were mounted on a single metal layer substrate, or individually packaged and mounted to a printed circuit board.
Eventually, the density of leads for a given substrate was increased by interconnecting leads to the substrate with a copper plated "through hole" (a mechanically drilled hole extending through all layers of the substrate and leads). An example of such a method is shown in U.S. Pat. No. 4,908,933 to Sagisaka et al. However, this method became impractical as the need for higher density increased since the process of drilling through holes cannot provide the close spacing needed. Further, the space opposite to the interconnect side of the substrate is unable to be utilized because the electrical connection within the hole extends through all layers.
Forming through holes by mechanical drilling has limitations. Through holes smaller than a certain size cannot be formed because of limitations on the size of the drill bits used to form the through holes. As the bits get smaller and smaller, they are increasingly likely to break during drilling, making mechanical drilling impractical for very small through holes. Further, the spacing between through holes is limited. If the spacing is too small, the material lying between an existing through hole and one being drilled will deform due to the forces imparted by the drilling process. For these reasons, the density of through holes (and thus electrical interconnections) is limited. In a one square inch substrate in which through holes have been formed in staggered rows by mechanical drilling, the number of leads (i.e., vias) is typically limited to approximately 256.
Additionally, the speed of through hole formation is limited when mechanical drilling is used. Through holes can only be drilled one at a time. If it is attempted to increase the speed of through hole formation by increasing the speed with which the drilling motion is repeated, the likelihood of breaking drill bits increases.
In response to these problems, a new technique was developed in which vias (small concave depressions in insulative material which connect a first conductive region to a second conductive region) are formed in the substrate at locations at which it is desired to make electrical interconnection between the leads and the substrate. Vias can also be formed in the substrate at locations at which it is desired to make interconnection between electrically conductive portions of various layers of the multilayer substrate. After forming the vias, electrically conductive material is deposited to connect the interior of each via or through hole to the inner portion of one of the leads or to an electrically conductive portion of a substrate layer.
Lasers may be used to form vias spaced more closely together so that greater via density is achieved than possible with mechanical drilling of through holes. Thermal lasers, such as CO.sub.2 lasers or Nd:YAG lasers, have been used to form vias in inorganic substrates. Thermal lasers emit laser energy that penetrates a material by heating the material to produce melting and evaporation.
Preferably, organic material is used to form the dielectric layers of multilayered substrates because of the lower cost, superior dielectric properties and ease of penetration of organic material. However, the use of a thermal laser in forming vias in organic materials produces undesirable side effects due to the heating of the material. These side effects include, but are not limited to, dielectric degradation, charring and surface reflow.
Further, prior use of lasers to form vias has been implicitly limited by the mechanical drilling model in that vias have been formed one at a time by a laser beam directed at the substrate. This approach is unnecessarily slow because it requires repositioning of the laser before forming each via, and each via must be completely formed before another is begun.
Therefore, there is a need for a method of forming vias in a single layer or multilayer substrate that is fast, achieves high via density, and does not overheat the substrate or cause other quality or reliability problems during formation of the vias. There is also a need for an integrated circuit package including a single layer or multilayer substrate in which vias are formed to achieve high interconnection density between electrical components within the package and between electrical components and the package leads.